This invention relates to a transceiver semiconductor device primarily used for wireless communication.
This invention also relates to U.S. Ser. No. 09/547,915 filed Apr. 11, 2001, entitled xe2x80x9cSEMICONDUCTOR INTEGRATED CIRCUITxe2x80x9d.
FIG. 5 of the accompanying drawings shows a structural example of terminal equipment to which a semiconductor integrated circuit for a dual-band wireless transceiver having a built-in differential low-noise amplifier (hereinafter called xe2x80x9ctransceiver ICxe2x80x9d) is applied.
The transceiver IC 501 is fabricated by incorporating a circuit of a dual-band high frequency part together with a frequency conversion circuit into one chip. The IC is connected to a base band IC 515 of a subsequent stage. The base band IC executes A/D and D/A conversion of signals, and executes also digital signal processing. The transceiver part of the transceiver IC 501 is formed of a low-frequency band differential low-noise amplifier 502a and a low-frequency band reception mixer 503a, a high-frequency band differential low-noise amplifier 502b, a high-frequency band reception mixer 503b, a low-pass filter 504, a variable-gain amplifier 505, a modulator 507 and an offset PLL 508. A high-frequency synthesizer 509, a local oscillator 510 provided outside the IC and a divider supply a high-frequency local oscillation signal necessary for frequency conversion. Similarly, a low-frequency synthesizer 512, a local oscillator 513 and a divider 514 supply a low-frequency local oscillation signal. Since the low-frequency amplifier has a differential construction, single-differential conversion that has been executed by use of a transformer as an external component is not necessary. Therefore, the number of external components can be reduced.
The differential low-noise amplifier comprises two unit amplifiers having the same construction, and conducts differential amplification by inputting two high-frequency signals having mutually inverse phases.
An example of the transceiver IC having a built-in differential low-noise amplifier is described in xe2x80x9cA RF Transceiver for Digital Wireless Communication in a 25 GHz Bipolar Technologyxe2x80x9d reported by Infineon Co. in ISSCC2000, pp. 144-145 and 451. This report describes a transceiver IC for DECT (Digital Enhanced Cordless Telecommunication). The low-noise amplifier of the reception system has a differential construction, but signal lines, ground lines, pin arrangement, and so forth, are not known. The package used is of a TSSOP38 pin type.
A typical example of the amplifier in which only the differential amplifier is constituted into an IC is an IF band gain control amplifier, TDA8011T for a satellite TV receiver, a product of Philips Co. (see DATA SHEET, February, 1995). The circuit has a differential construction, inputs signals from package pins IF11 and IF12 and outputs them from IFO1 and IFO2. A ground pin is one pin. Another example is a 1.6 GHz band differential broadband amplifier, xcexcPC2726T, a product of NEC. FIG. 8 shows the pin arrangement and the circuit diagram. The circuit inputs signals from in1 and in2 and outputs them from out1 and out2.
However, IC manufacturers other than those described above have not produced a differential amplifier each of the unit amplifiers of which has a ground pin.
It is an object of the present invention to improve a gain of an amplifier having a differential construction such as a low-noise amplifier.
Next, the causes that invite the drop of the gain of a high-frequency amplifier will be described with reference to FIG. 6. FIG. 6 is an equivalent circuit diagram representing mutual conductance Gm when an amplifier IC chip is mounted to a package. A transistor 601 is a transistor dedicated to the amplifier main body. A high-frequency signal is inputted from a base of 602. A collector current ic flows when a suitable bias voltage is applied. Impedance Ze due to a bonding wire and a pin adds to the emitter of the transistor 601. This impedance lowers overall mutual conductance Gm of the amplifier much more than mutual conductance gm of the transistor 601 as represented by equation 601 shown in FIG. 6. Therefore, the number of ground pins is increased and Ze is connected in parallel in an amplifier calling for a high gain. In this way, the inductance component of the bonding wire and the pin can be reduced.
TABLE 1 shows the pin arrangement of a package, an equivalent circuit and an inductance component when an amplifier has two lead pins (hereinafter called xe2x80x9cground pinsxe2x80x9d) to be connected to a power supply line of a unit amplifier. The upper column of TABLE 1 represents the case where the ground pins of the first unit amplifier 101 shown in FIG. 1A are arranged adjacent to each other. Explanation about a circuit using a concrete circuit will be explained in a later-appearing embodiment. An input pin IN1 and ground pins G1 and G2 are pins of the first unit amplifier 101. Pins IN2, G3 and G4 are pins of the second unit amplifier 106 that forms a pair with the unit amplifier 101. Symbol L represents inductance due to the bonding wire and the pins. Since the gap between the pins of the IC is extremely small, trans-coupling exists between the pins, and is expressed by mutual conductance M. In this pin arrangement, the voltages of the adjacent ground pins have the same phase. As is obvious from TABLE 1, therefore, the inductance does not drop to the half even when the ground pin is two pins. The inductance is generally about 70% in comparison with the single pin.
Next, the construction in which the ground of the unit amplifier has a one-pin structure will be explained. FIG. 1B shows the circuit. In this construction, the ground pins of the unit amplifiers 101 and 106 shown in FIG. 1A change to only G1 and G3. In the circuit shown in FIG. 1B, a collector current increases when a positive voltage is inputted to the base of a transistor 102 of the first unit amplifier 101 and the voltage drops through a load resistor 105. In consequence, the collector voltage drops and the input signal and the output signal have an inverse phase relation. This also holds true of the second unit amplifier 106. Since the input signal has the inverse phase, however, the circuit operations of 101 and 106 have the inverse phase to each other.
TABLE 2 tabulates the pin arrangement of the package and the emitter impedance of the transistor when the ground pin of the unit amplifier is only one. The upper column of this table represents the case where the ground pin G1 of the first unit amplifier 101 shown in FIG. 1b and the input pin IN2 of the second unit amplifier 106 are arranged adjacent to each other. In this case, the pins have the same phase. Therefore, the impedance developing in the emitter of the transistor becomes greater and overall Gm of the amplifier decreases with the drop of the gain.
According to one aspect of the present invention, in a differential amplifier having two lead pins (hereinafter called the xe2x80x9cground pinsxe2x80x9d) connected to a power supply of a unit amplifier, the ground pins of the first unit amplifier are arranged adjacent to the ground pins of the second unit amplifier on the 1:1 basis in order to improve the gain of the amplifier. The lower column of TABLE 1 illustrates an example of the pin arrangement in one embodiment of the present invention. In this case, the adjacent pin voltages have inverse phases due to the differential signals. As expressed by the equivalent circuit in TABLE 1, the total inductance can be reduced to below the half of the bonding wire and pin inductance.
According to another aspect of the present invention, when the ground pin of the unit amplifier is one pin, lead pins connected to input lines (hereinafter called the xe2x80x9cinput pinsxe2x80x9d) are arranged adjacent to each other in order to improve the gain of the amplifier.
The lower column of TABLE 2 illustrates an example of the pin arrangement in one embodiment of the present invention. As can be appreciated clearly by comparing the impedance formulas of the upper and lower columns of this table, the signals have the inverse phases when the input pin and the ground pin of the same amplifier are arranged adjacent to each other, so that the impedance developing in the emitter of the transistor is smaller.